Candidate ID

SRRCC1717

Highest Qualification

Degree

Course Name

BE - EC

Years of Experience

5+

Current Work Location

India

Current Industry Type

Information Technology

Additional Skills

CURRICULUM VITAE Mr. RAKESH S. JAIN S/O. Mr. SUBHASHCHANDRA K. JAIN Incore Bonsai Homes Flat No. 208, 2nd Floor, Tower 1, Survey no. 323/2 4, Tellapur Village, Ramachandrapuram Mandal, Medak. Hyderabad 502032 Phone No.: 0091 95335 24515 EMAIL: jainrak gmail.com, rs jain yahoo.com PERSONAL PROFILE: Overall experience of 12 years out of which 10 years of experience in embedded hardware PCB Designing and have worked on various platforms 2 month onsite at Houston, TX, USA experience in PCB design and development Worked at various levels like Team Lead, Project Lead, reporting of status of design and day to day activity for ongoing designs to client Domain expertise in industrial verticals viz., Industrial Automation, Medical, Consumer, Automotive and Oil & Gas field Broad range of experience accomplished with all phases of library creation, PCB layout creation, schematic creation using various tools and worked at various levels Strong Knowledge in PCB fundamentals like DFM, DFT and EMI/EMC guideline Hands on experience with very high speed design (up to 400MHz) with matched length for over 200 lines (which includes, 176 data line, address and control lines) Work experience of 3 mil trace width and 3 mil air gap for HDI design Worked with design requiring blind and buried vias technology due to very complex and high density Knowledge of signal integrity tools like Mentor Hyperlynx for high speed design to determine signal quality and cross talk Hands on experience of PCB reverse engineering Strong knowledge of QA/QC of schematic and layout design Strong knowledge of Calculation of impedance for controlled impedance board using Polar Impedance controlled Software and using Mentor Hyperlynx Strong knowledge of setting layer stack up considering EMI/EMC guideline Interaction with PCB fabricator for impedance calculation for deciding core & prepreg thickness to be used BOM customization and management Replacement of non RoHS parts with RoHS equivalent part Hands on experience of QTP (qualification test plan) execution for hardware testing using Digital Storage Oscilloscope and Logic Analyzer Hand on experience in general board bring up for supply point check Resume screening and interviewing Excellent communication, analytical, interpersonal and presentation skills Hands on experience in managing multiple tasks For medical domain followed ISO13485 standard for design and manufacturing of medical device Also familiar with clearance standard of FDA 510K, to get the approval for medical devices Performance reporting, team building, training new joinees SKILLS: Operating System DOS, WinXp, Win9X, Windows 2000/NT Domain Experience Automation, Consumer, Medical, Oil & Gas field, Automotive Layout Tools Cadence Allegro, Mentor PADS, Mentor Expedition PCB, Altium Schematic tool Orcad CIS Capture, Mentor Design Capture, PADS Logic, Altium Language C, C++, Exposure to Embedded programming Job Functions PCB Design, Library Management, QA/QC, Customer support Guideline IPC guideline for various standards (IPC 2221, IPC 7351) CAM/CAD tool CAM350, Gerbtool Others AutoCAD 2D, Polar Imp. Controlled software, MS office SI tool Mentor Hyperlynx for Signal integrity and cross talk simulation Education Diploma in Electronics & Communications Engineering, Technical Examination Board, Gujarat State, India Bachelor of Engineering in Electronics & Communications, Gujarat University, Ahmedabad, India Visa Status Valid USA business VISA class B1/B2 till 19 Oct 2011 Valid USA business VISA class H1B till 30 Sept 2014 Professional profile 1. CMC Limited JOB PROFILE: Leading multiple PCB design project running across CMC as Project Lead Train new joiners for PCB design guidelines Single point to workout for reduction of EMI/EMC issue and signal integrity Single point for reviewing high speed PCB design layout BOM customization and management EMI/EMC testing for board, QTP execution for board testing I ve been to Houston, USA for 2 month on project requirement and gathering process Resume screening and interviewing new candidate Role : Project Lead DURATION : July 2010 to Till Date Some Key Project details Project : Freshwater meter RF PCB Type of Project : Development Duration : 2 month Role : Sr. Layout engineer Platform : Mentor PADS layout Version 9.1 Mentor Pads Logic Version 9.1 CAM350 This board is to be used at frequency of 868 MHz to collect water meter reading from another PCB using IPC interface connector. The board has got Antenna and a very low voltage SPDT selection switch to select either transmit/receiver mode. The board has also got RF transceiver Si4432 from Silicon Lab, 16 bit core size MSP430F series mixed signal microcontroller from Texas Instruments requiring 32 KHz external clock and 512Kb serial SPI bus EEPROM from M95512 series of ST Micro for data log purpose. It also uses RS232 interface for debug purpose using external PC. The board required special attention for routing of Antenna path of 868 MHz consisting Harmonic filter, Low pass filter, Harmonic termination SAW filter input/output matching network and four element matching network. The board is routed using 50 ohm controlled impedance in four layers. Project : KVM Flip board Type of Project : Development Duration : 1.5 month Role : Sr. Layout engineer Platform : Altium Designer Version 6.0 CAM350 This board is to be used for sharing one monitor, keyboard, mouse and speaker with two different computers (like one laptop and one desktop), thereby reducing the need of another set of monitor, keyboard, mouse and speaker. It has one LED that indicates which computer Flip is accessing. The main worry from client was to get the board clear from EMI/EMC test because there were two different GND plane and two different voltage levels to accommodate in very small PCB size. There were digital and analog signals (audio signal) which needed to be routed with enough spacing between them so as to avoid cross talk and EMI/EMC failure. The 6 layer board stack was decided by putting power/GND plane together and also by embedding them in stack, the signal layer were also tightly coupled with GND plane so as to achieve good EMC performance. The board required special attention for routing of DVI single end and differential pair following DVI guideline for matching length of signals, USB differential pair, analog signals to be routed as much as possible away from digital circuit. Common mode chokes added for DVI and USB differential signals as well ferrite bead added for single end critical signals like HOST 1 & 2 selection signal (for any one from two different PCs), toggle signals and analog GND to get improved EMC performance and eliminate EMI. High speed design guideline followed for controlled impedance signals and matched length signals. The board passed through EMI/EMC test after following all these. It got appreciated from client for successful completion of design. Project : Recapture of PCAD database in Altium Type of Project : Maintenance Duration : 2 month Location : Houston, Texas, USA Role : Project Lead Platform : Altium Winter Version 9.0 CAM350 The client wanted to convert legacy board originally designed in DOS based PCAD to Altium Winter Version 9.0 following database. The task is critical because the final output should exactly match with originally designed board. The client was happy with overall progress of project. 2. PATNI COMPUTER SYSTEMS LIMITED JOB PROFILE: Multi layer PCB designs for high speed signals & impedance controlled signals Work also includes testing of PCB hardware according to Qualification Test Plan (QTP) and functional test plan (FTP) Good knowledge of EMI/EMC issue and signal integrity Replacement of non RoHS parts with RoHS equivalent BOM customization and management Resume screening and interviewing new candidate Train new joiners for PCB design guidelines DESIGNATION : Team Lead DURATION : April 2008 to July 2010 Some Key Project details Project : Backplane Traffic Analyzer Module Type of Project : Development Duration : 6 month Role : Sr. Layout engineer Platform : Mentor Design Capture 2007 Mentor Expedition 2007 AutoCAD 2009 Hyperlynx CAM350 The primary purpose of this module was to gather the backplane traffic and store it in the SODIMM module for analysis. There were two board designed for this backplane analyzer module viz., main board and daughter board. The main board designed in 10 layers consists of microprocessor from cold fire family (MCF5329) of Freescale Semiconductor, DDR from Micron, NOR Flash from Numonyx, cool runner CPLD from Xilinx for display, phyter IC for 100 Base T RJ 45 and USB host. The daughter board designed in 14 layers consists of Virtex 5 family FPGA, two SODIMM module, and Gigabit Ethernet Phyter IC and Gigabit Ethernet Copper port. The daughter board was sitting over main board using high speed connector from Samtec Inc. As a Sr. Layout engineer, my primary responsibilities were: Schematic Generation and approval from HW engineer Placement of Component and approval from HW engineer Setting of design Constraint as per guideline Routing of board and approval from HW engineer Generation of final Build of Material Interaction with fabricator and assembler for DFM, DFA, controlled impedance issues Finalizing Later stack up Some key achievements in this project were: Routing of 128 bit data lines to SODIMM on daughter board for controlled impedance and matched length of speed of 400MHz Routing of 16 bit data bus on main board for control impedance and matched length of speed of 200MHz Routing of matched length controlled impedance address lines Routing of matched length controlled impedance control lines There were 16 data bank and each bank consists of 11 lines (8 data lines, DQS differential pair and one DM bit) which are to be matched length and routed to SODIMM on daughter board The challenging task was to fit both of these modules in small enclosure Mechanical challenges for deciding board size which will fit in customized enclosure Routing of daughter board required 3 mil trace width and airgap Project : Testing, boards bring up and circuit design Type of Project : Maintenance & Development Duration : 6 month Role : Hardware Engineer As a Hardware engineer, my primary responsibilities were: Testing of PCB according to Qualification Test Plan (QTP) and functional test plan (FTP) using DSO and LA General board bring up which includes check for supply on board Capturing waveforms using DSO and LA Searching of SMD RoHS compliant for existing thru hole non RoHS component Component selection in case of obsolete part Signal integrity using Mentor Hyperlynx for determining cross talk and signal quality Layout review for layer stack up and to check high speed guidelines Project : PCB & Schematic Design Type of Project : Maintenance & Development Duration : 4 month Role : Sr. Layout Engineer Platform : Mentor Design Capture 2005 Mentor Expedition 2005 The client provides schematics as the inputs and the team does the layout activity. In few cases, hard copy of hand drawn schematics is received to convert in intelligent format using Design Capture. The client has also provided general PCB guidelines to meet the requirements of their manufacturing facility. As a Sr. Layout engineer, my primary responsibilities were: Schematic Generation and approval from client Placement of Component and approval from client Setting of design Constraint as per guideline Routing of board and approval from client Penalization of design Generation of ODB++ for fabrication Generation of final Build of Material Project : Redesign of Plasma Collection System (PCS) Type of Project : Redesign of existing board using SMT & RoHS components Duration : 8 months Role : Sr. Layout Engineer Platform : Orcad CIS Capture V16.2 Mentor PADS 2007 AutoCAD 2007 CAM350 The client is manufacturing of Medical equipments and deals in blood collection and transfer management located at North America. The primary purpose of this project is to replace the existing non RoHS components of Plasma Collection system to its equivalent RoHS compliant parts. As a Sr. Layout engineer, my primary responsibilities were: BOM generation Schematic modification as per requirement and its approval from client Component placement and its approval from client Setting of Design Constraint as per guideline Routing of board and approval from client Generation final files for fabrication Generation of final Build of Material Reverse Engineering Below is the summary of printed circuit board designed by me under this project: Additional Valve Board The schematics are created using OrCAD CIS capture and PCB Layout was created in Mentor PADS 2007. The primary function of this board is to operate four valves according to the command received from the CPU board via PC bus interface backplane board. The Ad Valve board is also used for system health monitor and fail safe mode. There was a cool runner family CPLD from Xilinx used which interacts with CPU board to control the operation of valves. High current driver solenoids were used to supply the current to these valves. The board involves uses of opto coupler for isolating analog part from its digital counterpart. These boards also have different analog signals processing from different sensors in the machine. From the PCB layout perspective the separation of different functionality circuits e.g. analog, digital and power is challenging. Also different power supplies like +1.8V, +3.3V, 5V, 15V, +15V, 28V are used on board so the planes of all these supplies are to be separated out during layout. Motor Driver Control Board The schematics are created using OrCAD CIS capture and PCB Layout was created in Mentor PADS 2007. This board is mainly heart of whole system which controls the operation of four valves & three motors according to the command received from the CPU board via the PC bus interface. This board controls three pump motors based on another motion control adapter board as commanded by CPU. This board also drives stage with over temperature shutdown and zero speed detection. The three pump motors are used for collecting blood from donor, anti coagulant to mix with blood and transfer of blood back to donor. The Spartan 3A family FPGA from Xilinx is used to interact with CPU through backplane PC bus, high current motor driver and valve driver solenoid. The boards have different type of circuits on them e.g. some of them were processing digital logics with FPGA while others were power boards driving motors and valve in the machine. There are different powers supplies like +1.2V, +3.3V, 5V, 15V, +15V and 28V used on board and from the PCB layout perspective; the separation of planes for all these supplies along with different functionality circuits e.g. analog and digital is challenging. There were 1000+ components used on board with very complex density. The minimum clearance and trace width followed is 5 mil with minimum drill size of 10 mil. Reverse Engineering This activity involves comparing layout photo files with schematic netlist created in Orcad Capture. CAM350 version 10.0 tool was used to create netlist from layout photo files which is then exported in Mentor PADS Version 4.0 compatible format. The schematic netlist is exported from Orcad Capture version 16.2 to PADS compatible format. Then Mentor PADS version 2007.0 is used to compare both of these netlist and sort out mismatch if any, between them. 3. ADAPATIVE TECHNOLOGY (INDIA) PVT. LTD. JOB PROFILE: Involved in all phases of design start from schematic entering to PCB layout and final deliverables Interact with client in order to get the solution of query, if any Involved with PCB design Engineer to deliver the database on schedule QA/QC of schematic and layout design Component Library management Training and ramp up for newly joined PCB designer Calculation of impedance controlled board using Polar Impedance controlled Software Interaction with PCB fabricator for impedance calculation for deciding core & prepreg thickness to be used Project : PCB Design Type of Project : Development Duration : 7+ years Role : 5 years as Team leader & 2+ years as Sr. PCB Designer Platform : Allegro V15.7 Polar Impedance software for Impedance Calculation Mentor PADS 2005 Orcad Schematic Capture V15.7 AutoCAD 2000 Gerbtool V10 CAM350 The client is one of Burin in Board manufacturer located at California in South America region. The client deals in design and manufacturing of PCB s used for Burn in Board technology. This technology is used for determining the life of device while operating in alive mode for several hours under temperature in range of 125 175 degree centigrade. The device is continuously monitored outside the oven till the process last.

Preferred Work Location

Singapore

Preferred Industry Type

Electrical & Electronics Engineering, Semi-Conductor